3500/32 Series Microcontrollers

3500/32

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Description

3500/32 Series Microcontrollers


The address of 3500/32 series microcontroller is calculated according to the way of byte, so A0=0 in 16-bit working mode has no practical significance. In the usual read/write situation, the AD1~AD15 addresses after latch are taken as A1~A15 and A16=0. The following is an example of the address expansion method by reading Flash ROM.

3500/32 For addresses that can be directly addressed, the EPLD acts as a latch and separates the AD0~AD15 time-shared address-data bus to generate separate address and data buses. Two special addresses are defined here: Address_F_R, the read address of the Flash ROM data block, and Address_F_RP, the address of the read location pointer. first, a 16-bit binary number is written to Ad-dress_F_RP, which represents the first address of the data block to be read, and the 16-bit representation ranges from 0 to 65535.

3500/32 can be specified in the first address range of 64K words or 128K bytes; then read operations from Address_F_R continuously, each read, the location pointer will be automatically added 1 without resetting. If you need to read a new location, you only need to write the new location data to Address_F_RP address. The implementation of this function inside the EPLD device is shown in Figure 3. The counter can be set synchronously with the initial value, counted synchronously, and declared as 1pm_counter in the AHDL language.