ALR121-S00 Digital Dual Channel Modules

ALR121-S00

Technical Parameters:

  • High-performance CPU with 50Mb memory, fast scan time
  • Industry-leading 7 communications ports, including built-in local expansion and Ethernet remote I/O ports are standard on the CPU
  • USB Programming and USB Data Logging are resident on the CPU
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Description

ALR121-S00 Digital Dual Channel Modules


ALR121-S00 By increasing the payload capacity of Autonomous Mobile Robots (AMRs) and increasing the flexibility of lifting applications, two new top-of-the-line modular products and companion accessories from pioneering MRE specialist ROEQ enable end-users to achieve their productivity goals and overcome labor shortages while avoiding significant additional capital investments in automation. The software class provides C++ developers with a powerful advanced card interface that makes real-time high-speed data acquisition easier to integrate into applications. Logic cores are also available for SDR applications providing 16 to 4096 DDC channels.

The modules feature dual-channel 1 GSPS 12-bit digitization with Virtex5 FPGA compute cores, DRAM and SRAM memory, and an eight-channel PCI Express host interface. 512 MB of DDR2 DRAM and 4 MB of QDR-II memory provide very high-performance DSP cores for demanding applications, such as direct RF digitization. The tight integration of analog IO, memory and host interfaces with the FPGA enables real-time signal processing at over 300 GMAC/s. The X5 G12 can be used by customers as a high performance DSP core for demanding applications such as direct RF digitization. Customers can use the X5 G12 as a front-end digitizer for 3G/4G wireless receivers. Data logging and analysis software is provided with each module. Data can be logged to system memory at full rate or to disk drives at rates supported by the drive and controller.

The module combines Innovative’s Velocia architecture with a high-performance 8-channel PCI Express interface to deliver sustained transfer rates in excess of 1 GB/s to the host. Dedicated link to host card, >1. Provides 6 GB/s capacity for system integration using P16. The X5 family can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. MATLAB BSP supports real-time hardware-in-the-loop development using a graphical, block-diagram Simulink environment with Xilinx System Generator. the X5 modules are fully supported by the software development tools, which include Device drivers, data buffers, card controls, and utilities enable developers to work efficiently from the start. At the most basic level, the software tools provide data buffers for your application without the need for low-level real-time control of the card.